The present invention relates generally to reduction of electromagnetic interference and specifically to reduction of electromagnetic interference generated within an integrated circuit device package.
Advents in the performance of microcomputer based electronics have resulted in dramatic increases in operating speeds of the logic switching circuits. Increased switching and operating speeds correspond to increased bandwidths of the electronic signals transmitted within the interior of an electronic device which become a significant source for electromagnetic radiation causing interference with the internal circuitry of the device itself and with other electronic devices operating within the vicinity of the device. The electromagnetic radiation emitted at these higher frequencies may cause undesirable electromagnetic coupling between data paths resulting in cross channel interference.
The amount of internally generated electromagnetic radiation must be limited to the guidelines and regulations set by governmental agencies such as the FCC in the United States and CISPR in European countries. Sources of electromagnetic radiation originating externally to the device may also affect and interfere with the operation of the device. In general the problems resulting form unwanted electromagnetic radiation are classified as electromagnetic interference (EMI).
A recurring observation in the analysis of EMI performance in products that use VLSI integrated circuits is that there is a significant amount of emission radiated directly from the integrated circuit package itself before the signal connections from the device are available on an external pin. This is particularly evident in devices that have a large number of pins, such as a common 208 pin Quad Flat Pack (QFP) device. A 208 pin QFP device is typically on the order of 1 inch square with the actual integrated circuit itself occupying only a small amount of the real estate of the QFP package. Typically, the integrated circuit (IC) is relatively small being on the order of 0.2 square winches to 0.3 square inches. As a result, there must be internal conductor leads from the IC silicon wafer to the external pins of the device. This is typically implemented with a lead frame of metal strips etched or stamped from a sheet of material to support the integrated circuit chip and to provide a signal path for the input and output (I/O) pins of the QFP device.
In such a design there may be a significant conductor length from the IC itself through the bonding wires and the lead frame conductors to the external pins of the device. This is especially true for pins at or near the corner of the device, in which case the conductor lead length may be well over 0.5 inch.
The described physical lead lengths in typical integrated circuit packaging designs generally cause two problems. The problem is mid and high frequency signal degradation introduced by the inherent series inductance of the conductor leads which is particularly a problem for the power and ground feeds. The second problem is that the conductor leads may radiate EMI energy as an antenna thereby interfering with the signals an adjacent conductor leads in the package and with other signal paths and components in the electronic device in which the integrated circuit is utilized. The techniques known in the art for reducing electromagnetic interference are effective only external to the integrated circuit device package. Thus, there lies a need for a method and apparatus to reduce or eliminate electromagnetic radiation internal to the integrated circuit device package itself.